X86 Accumulation 16 32 and 64 $.25

 14 October 19:43   

    x86 accumulation has a amount of differences amid architectures that are 16 bits, 32 bits, and 64 bits. This page will allocution about some of the basal differences amid architectures with altered bit widths.

    All the 8086 registers were 16-bit wide. The 8086 registers are afterward (also on any Windows based system, by entering into DOS carapace you can run a actual accessible program alleged debug.exe, actual advantageous for acquirements about 8086 and is alien forth with all Windows versions)AX, BX, CX, DX, BP, SP, DI, SI, CS, SS, ES, DS, IP.

    ;AX, BX, CX, DX: These registers can aswell be addressed as 8-bit registers. So .

    So the problem was how can 20-bit abode amplitude be referred to by the the 16-bit registers. So they came up with articulation registers CS(Code Segment), DS(Data Segment), ES(Extra Segment), SS(Stack Segment). So to catechumen a 20-bit address, one would first bisect it by 16 and abode the caliber in articulation annals and butt in the account register. This was represented as, CS:IP (this means, CS is articulation actuality and IP is offset), additionally if its accounting SS:SP it agency SS is articulation actuality and SP is offset.

    If CS = 258Ch and IP = 0012h (h is to reperesnt that ethics are in hexadecimal), then CS:IP will point to 20 bit abode agnate to CSx16 + IP which will be = 258Ch

    The 20-bit abode is aswell accepted as Complete abode and the Segment:Offset representation (as in CS:IP) is accepted as Anecdotal Address. One important point to agenda actuality is that Anecdotal representations are not different and that two acutely altered representations can infact point to aforementioned complete abode (or 20 bit address).

    To accord you an archetype of this, Accede these two representations: B000:8000 and B200:6000. If you appraise them to their complete 20 bit abode (also accepted beeline address), they both map to B8000. (B000:8000 = B000x10+8000 = B0000+8000 = B8000) and (B200:6000 = B200x10+6000 = B2000+6000 = B8000)

    Moral of the story: Both B000:8000 and B200:6000 although attending altered but point to aforementioned area in concrete memory. So if you accurate this in a little algebraic way, the action mapping from 20-bit complete abode to anecdotal abode is not one to one or alternatively you can catechumen an complete abode to anecdotal abode in some altered ways. But the about-face address that I discussed aloft aswell happens to be a different one, if you catechumen by that technique, that is by adding 20 bit abode by 16 first and authoritative caliber as the articulation and butt as the offset, then in that case you will consistently get a different anecdotal representation. This Anecdotal representation is accustomed a appropriate name, such addresses are said to be Normalized Addresses. Clearly, if we would accept adapted B8000 by this method, we would accept got one constant representation, namely, B800:0000 and not B000:8000 and B200:6000.

    CS:IP (Code Segment: Apprenticeship Pointer) represents the 20 bit abode of the concrete anamnesis from area next apprenticeship for beheading will be best up. Likewise, SS:SP (Stack Segment: Assemblage Pointer) point to 20 bit complete abode which will be advised as Assemblage Top (8086 uses this for pushing/popping values)

    Like I said beforehand also, the 8086 processor had 20 abode curve (from A0 to A19), so the absolute anamnesis addressable by it was 1MB (or 2 to the ability 20). But back it had alone 16 bit registers, so they came up with segment:offset arrangement or abroad using a individual 16-bit annals they couldnt accept possibly accessed added than 64Kb (or 2 to the ability 16) of memory. So this create it accessible for a program to admission the accomplished of 1MB of memory.

    But with analysis arrangement aswell came a ancillary effect, not alone with this arrangement your cipher can accredit to the accomplished of 1MB but infact a little added than that. Lets see how...

    Lets accumulate in mind, how we catechumen from a Segment:Offset representation to Beeline 20 bit representation.

    The Conversion:-

     Segment:Offset = Articulation x 16 + Offset

    Now to see, the max anamnesis that can be addressed, lets ample in both Articulation and Account to max ethics they can board and then catechumen that amount to its 20-bit complete concrete address.

    So, Max amount for articulation = FFFF

    & Max amount for Account = FFFF

    Now, lets convert, FFFF:FFFF into its 20-bit beeline address, address in apperception 16 is represented as 10 in hexadecimal :-

    So we get, FFFF:FFFF = FFFF x 10 + FFFF = FFFF0 + FFFF = FFFF0 + (FFF0 + F) = FFFFF + FFF0 = 1MB + FFF0

     FFF0 is according to 64Kb bare 16 bytes.

    Moral of the story: From Absolute approach a program can infact accredit to (1MB + 64KB - 16) bytes of memory.

    Notice the use of the chat accredit and not access. Program can accredit to this abundant anamnesis but whether it can admission it or not, that is abased on the amount of abode curve infact present. So with 8086 this was absolutely not accessible because if program create references to 1MB additional memory, the abode that was put on the abode curve was infact added than 20-bits, and this resulted in wrapping about of the addresses.

    For example, if a cipher is apropos to 1Mb + 1, this will get captivated about and point to Zeroth area in memory, additionally 1MB+2 will blanket about to abode 1 (or 0000:0001).

    Now there were some cool blue programmers about that time who manipulated this affection in their code, that the addresses get captivated about and create their cipher a little faster and a beneath bytes shorter. Using this address it was accessible for them to admission 32kb of top anamnesis breadth (that is 32kb affecting 1MB boundary) and 32kb anamnesis of the basal anamnesis area, after infact reloading their articulation registers!

    Simple maths you see, if in Segment:Offset representation you create Articulation constant, then back Account is a 16-bit amount accordingly you can roam about in a 64Kb (or 2 to the ability 16) breadth of memory. Now if you create your articulation annals point to 32kb beneath 1MB mark you can admission 32KB upwards to blow 1MB abuttals and then 32kB added which will ultimately get captivated to the basal alotof 32kb.

    Now these cool blue programmers disregarded the actuality that what if in approaching processors with added abode curve appearance up. (Note: Bill Gates has been attributed with saying, Who would charge added than 640KB memory?, these programmers were apparently cerebration similarly). And in 1982, just 2 years afterwards 8086, the 80286 processor was realeased by Intel accepting 24 abode lines, it aswell accurate Absolute Approach and acutely the programs of these cool blue programmers started to break, back addresses were no best accepting captivated around. So for the account of compatbility IBM engineers baffled this A20 abode band (8086 had A0 - A19) through Keyboard ambassador and this keyboard ambassador could be programmed to enable/disable A20 line. Now if you are apprehensive why the KeyBoard controller, the acknowledgment is it had a pin spare. You see this was all patching up job, it was never advised this way, but aberrant situations appearance up at times so this was infact a workaround.

    32-bit addresses can awning anamnesis up to 4Gb in size. This agency that we dont charge to use account addresses in 32-bit processors. Instead, we use what is alleged the Collapsed acclamation scheme, area the abode in the annals anon credibility to a concrete anamnesis location. The articulation registers are acclimated to ascertain altered segments, so that programs dont try to assassinate the assemblage section, and they dont try to accomplish assemblage operations on the data area accidentally.